In this paper, we present the implementation of proton beam irradiation test logic and test results for Xilinx's RFSoC FPGA. In addition to the FPGA function, RFSoC is a chip that integrates CPU, ADC, and DAC and is attracting attention in the defense and space industries aimed at reducing the size of the chip. In order to use these chips in a space environment, an analysis of radiation effects was required and radiation mitigation measures were required. Through the proton irradiation test, the logic to measure the radiation effect of RFSoC was designed. Logic for comparing values stored in memory with normal values was implemented, and protons were irradiated to RFSoC to measure SEU generated in the block memory area. To alleviate the occurrence of SEU in other areas, TMR and SEM were applied and designed. Through the test results, we intend to verify this test configuration and establish an environment in which logic design for satellites can be verified in the future.